It’s true. I’m insane. A few days ago I became obsessed with recreating the NES (Nintendo Entertainment System) on an FPGA. There are many emulators out there but I only know of two projects that have tried to re-implement the hardware.
- Kevin Horton appears to have created a full implementation however few details are shared other than pictures documenting the process. The source code has not been shared.
- Dan Leach adapted a public available 65C02 to drop into the NES for his graduate thesis. No other parts of the system were implemented. Source Code is available from his page.
I’m going to do a full ground up implementation. Why? Because it’s fun (told you I was crazy.) It’s all under the Apache Licence. Why? Because I’m not so crazy I want to try to make money off of it. If someone else is crazy enough to try, more power to ‘em. Source can be found at github.
Getting Started

The Nios II Embedded Evaluation Kit (of NEEK) from Altera looks like a great board to us with the additional advantage that a coworker is going to lend me one. Altera’s basic design software Quartis is available as a free download from the their website.
For simulation and development, Icarus Verilog and GTKWave provide a really quick devlopment cycle.
Some documentation I’ve found invaluable:
Progress so far

In the last two night’s I’ve managed to get enough of a 6502 working to support the NOP, JMP imm, JMP ind, LDA imm, LDX imm, and LDY imm instructions. Above is a trace of the core running the following code:
reset:
nop
nop
lda #$5A
ldx #$CA
ldy #$FD
jmp $addr
.db $00
.db $00
.db $00
.db $00
.db $00
addr:
.db $01
.db $00